1. Field of the Invention
The present invention relates to a protection circuit for protecting the FET or the like for control of the energization state of current to the inductive load, and more particularly to a protection circuit to be applied for power source control of the vehicle-mounted power distributor section in various kinds.
2. Background Art
FIG. 6 is a circuit diagram of the conventional protection circuit and circuit arrangement the protection circuit is applied. The protection circuit of this kind, as shown in FIG. 6, has a Zener diode 5 interposed between the gate and the drain of an FET 3 as an N-channel MOS transistor, a switch 9 interposed on a connection line between the gate and a charge pump circuit 7 as a gate-drive voltage supply source thereof, a first resistor 11 interposed between the gate and the source of the FET 3 and a second resistor 13 interposed between the gate of the FET 3 and the switch 9, as a countermeasure to the surge voltage caused upon powering off the inductive load (e.g. motor) 1.
The switch 9 serves also as an on-off switch for the FET 3. During driving the load 1, the switch 9 connects between the FET 3 gate and the charge pump circuit 7 thereby turning on the FET 3. Meanwhile, when the load 1 is powered off, the switch 9 disconnects between the gate and the charge pump circuit 7 thereby turning off the FET 3. Consequently, during driving the load 1, the drive voltage outputted from the charge pump circuit 7 is supplied to the gate of the FET 3 through the switch 9 and resistor 13. This turns on the FET 3, thereby energizing the load 1 and driving the load 1. During powering off the load 1, the switch 9 disconnects between the FET 3 gate and the charge pump circuit 7. This turns off the FET 3 at a time the gate voltage goes below a threshold voltage. Due to turning off the FET 3, a negative surge is caused on the source potential of the FET 3 by an inductive counter electromotive force on the load 1. The negative surge pulls the gate potential toward the minus through the resistor 1. When the gate-to-drain voltage difference of the FET 3 exceeds the threshold voltage of the Zener diode 5, the FET 3 is brought into conduction between the gate and the drain through the Zener diode 5. A current flows from the drain to the source through the Zener diode 5 and resistor 11. When the gate-to-source voltage difference caused thereupon exceeds the threshold voltage, the FET 3 is turned on. The on-state of the FET is held until the gate-to-source voltage goes below the threshold value. Therefore, during on of the FET 3, the counter electromotive force on the load 1 is absorbed by the power supplied through the FET 3.
FIG. 7 is a figure showing the manner of a surge current, etc., during powering off the load 1, in the circuit arrangement of FIG. 6. In FIG. 7, the graph G1 represents a change in time of a current IL (see FIG. 6) flowing through the load 1 during powering off the load 1, in the circuit arrangement of FIG. 6 while the graph G2 represents a change in time of a source voltage Vs (see FIG. 6) of the FET 3 during powering off the load 1, also in the circuit arrangement of FIG. 6. Meanwhile, the graph G3 of FIG. 7 represents a change in time of a source voltage Vs during powering off the load 1 when the Zener diode 5 is removed, in the circuit arrangement of FIG. 6.